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Luigi Pomante

Dottore di Ricerca in Ingegneria Informatica

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A System-Level Methodology
for HW/SW Co-Design of
Heterogeneous Parallel Dedicated Systems

 

Main References

L. Pomante, D. Sciuto, F. Salice, W. Fornaciari, C. Brandolese, “Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC”, IEEE Transactions on Computers, Vol. 55, Iss. 5, May 2006.

L. Pomante, “System-Level Design Space Exploration for Dedicated Heterogeneous Multi-Processor Systems”, IEEE International Conference on Application-specific Systems, Architectures and Processors, September 2011.

L. Pomante, “HW/SW Co-Design of Dedicated Heterogeneous Parallel Systems: an Extended Design Space Exploration Approach”. IET Computers & Digital Techniques, Institution of Engineering and Technology, 2013, Vol. 7, Iss. 6, pp. 246–254.

Other Journals

L. Pomante. “System-Level Design Space Exploration for Heterogeneous Parallel Dedicated Systems”, DLINE Journal of Electronic Systems, 2013, Vol. 3 , Iss. 2

L. Pomante, P. Serri, "SystemC-based HW/SW Co-Design of Heterogeneous Multiprocessor Dedicated Systems", International Journal of Information Systems, 2014, Vol.1

Other Conference Papers

L. Pomante, S. Marchesani, P. Serri, “Design Space Exploration for Heterogeneous Multi Multi-Core Processor Dedicated Systems”. 3th Workshop on Design, Modeling and Evaluation of Cyber Physical Systems (CyPhy'13), Philadelphia, April 2013.

L. Pomante, S. Marchesani, P. Serri, “System-Level Design Space Exploration for Heterogeneous Parallel Dedicated Systems”. ICMAES'2013 - The International Conference on Machines Applications and Embedded Systems, Computer and Information Technology (WCCIT), 2013 World Congress on , Sousse (Tunisia), June 2013.

F. Federici, V. Muttillo, L. Pomante, P. Serri, G. Valente, "A Model-Based ESL HW/SW Co-Design Framework for Mixed-Criticality Systems", EMC² Summit at CPS Week, Vienna, Austria, 11 April 2016

D. Di Pompeo, E. Incerto, V. Muttillo, L. Pomante, G. Valente, "An Efficient Performance-Driven Approach for HW/SW Co-Design", International Conference on Performance Engineering (ICPE '17), 2017, ACM, New York, NY, USA, 323-326. 

Work in Progress Sessions Papers

D. Ciambrone, V. Muttillo, G. Valente, L. Pomante, "HW/SW Co-Simulator for Embedded Heterogeneous Parallel Systems", Euromicro Conference on Digital Systems Design (DSD) - Work in Progress Session, 2017

V. Stoico, V. Muttillo, G. Valente, L. Pomante, F. D'Antonio, "CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies", Euromicro Conference on Digital Systems Design (DSD) - Work in Progress Session, 2017 

Invited Talks

V. Muttillo, G. Valente, L. Pomante, “A Survey of Mixed-Criticality System Implementation Techniques”, EMC2 at Mixed-Criticality Systems Workshop (MCC), Barcelona, Spain, 22 Nov. 2016*

V. Muttillo, G. Valente, L. Pomante "An integrated ESL methodology for developing embedded parallel systems in mixed-criticality scenarios", Italian Workshop on Embedded Systems (IWES), Pisa, Italy, 19-20 Sept. 2016

V. Muttillo, D. Ciambrone, V. Stoico, G. Valente, L. Pomante, "HEPSYCODE-RTMC: a Real-Time and Mixed Criticality Extensions for a System-Level HW/SW Co-Design Methodology", Italian Workshop on Embedded Systems (IWES), Roma, Italy, 07-08 Sept. 2017

V. Muttillo, V. Stoico, G. Valente, L. Pomante, F. D'Antonio, "CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies", Italian Workshop on Embedded Systems (IWES), Roma, Italy, 07-08 Sept. 2017

Posters

V. Muttillo, : "Model-Based ESL HW/SW Co-Design Framework for Mixed Criticality Systems", In: International Conference on High Performance and Embedded Architecture and Compilation (HiPEAC), Prague, Czech Republic, 18-20 Jan. 2016

F. Federici, V. Muttillo, L. Pomante, P. Serri, G. Valente, "A Model-Based ESL HW/SW Co-Design Framework for Mixed-Criticality Systems", EMC² Summit at CPS Week, Vienna, Austria, 11 April 2016

V. Muttillo, G. Valente, L. Pomante, W. Tiberti, “HEPSYCODE-RT: a Real-Time and Mixed Criticality Extension for a System-Level HW/SW Co-Design Methodology”, International Conference on High Performance and Embedded Architecture and Compilation (HiPEAC), Stockholm, Sweden, 23-25 Jan. 2017

V. Muttillo, G. Valente, L. Pomante, L.: “System-Level DSE for Mixed Criticality Systems” , EMC2 Final Review 2017, Granada, Spain, 30-31 May, 1-2 Jun. 2017

Demos

D. Ciambrone, D. Di Pompeo, E. Incerto, V. Muttillo, L. Pomante, G. Valente, "HEPSYCODE: A System-Level Methodology for HW/SW Co-Design of Heterogeneous Parallel Dedicated Systems", Conference on Design and Test Automation in Europe (DATE), University Booth, Swisstech, Lausanne, Switzerland, 27-31 Mar. 2017 

Books

L. Pomante. “Electronic System-Level HW/SW Co-Design of Heterogeneous Multi-Processor Embedded Systems”, The River Publishers Series in Circuits and Systems, June 2016. 

Relevant Contributions in European Research Projects

EMC2 (Embedded Multi-Core systems for Mixed Criticality applications in dynamic and changeable real-time environments)

Deliverable D2.3: Design, implementation, prototyping and verification approach for mixed-critical and parallel applications, Sep. 2015

Deliverable D2.4: Intermediate validation report based on selected living labs scenarios, Mar. 2016

Deliverable D2.5: Complete modelling and analysis framework, Oct. 2016

Deliverable D2.6: Comprehense validation report for the modelling frameworks and offline tools, based on refined living labs results, Apr. 2017 

MEGAM@RT2

WIP 

Aquas

WIP

 

Embedded Systems 2017/18

Embedded Systems 2016/17

Embedded Systems 2015/16

Projects & Thesis 2016/17

 

 

 

SEGNALINK

HEPSYCODE

SpaccaParola

NoiseLab Studio

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